Wafer level MOSFET metallization
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United States of America Patent
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Oct 21, 2014
Grant Date -
Oct 24, 2013
app pub date -
Jun 14, 2013
filing date -
Mar 29, 2011
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Abstract
In one general aspect, a system can include a through-silicon-via (TSV) coupling a drain region associated with a vertical transistor to a back metal disposed on a second side of the substrate opposite the first side. The system can include a first metal layer, and a second metal layer aligned orthogonal to the first metal layer. The system can define a conduction path extending substantially vertically through the TSV to the substrate and laterally through the substrate.
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