Reversible write-protection for non-volatile semiconductor memory device
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United States of America Patent
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Sep 23, 2014
Grant Date -
May 9, 2013
app pub date -
Dec 3, 2011
filing date -
Nov 8, 2011
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Abstract
A serial memory device having a non-volatile memory array including a plurality of memory blocks, one or more said plurality of blocks being capable of being placed in a locked or an unlocked state upon receiving designated lock or unlock signal sequences is provided. The unlock signal sequences comprises at least two sequential signal sequences: a first unlock sequence, which has 1 to 7 signal bits, is applied to one of address input pins or a logic low enabled write-protection input pin and a second unlock sequence follows the first unlock signal sequence and is applied to a serial data access pin. The memory device further comprising a control logic circuit block coupled to a write-protection circuit block to provide means to identify the designated lock and unlock signal sequences and to set a protection state in a security area.
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