Method for forming gate, source, and drain contacts on a MOS transistor
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United States of America Patent
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Sep 2, 2014
Grant Date -
Nov 7, 2013
app pub date -
Apr 26, 2013
filing date -
May 4, 2012
priority date (Note) -
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Abstract
A method for forming gate, source, and drain contacts on a MOS transistor having an insulated gate including polysilicon covered with a metal gate silicide, this gate being surrounded with at least one spacer made of a first insulating material, the method including the steps of a) covering the structure with a second insulating material and leveling the second insulating material to reach the gate silicide; b) oxidizing the gate so that the gate silicide buries and covers the a silicon oxide; c) selectively removing the second insulating material; and d) covering the structure with a first conductive material and leveling the first conductive material all the way to a lower level at the top of the spacer.
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