IEEE1588 protocol negative testing method

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United States of America Patent

PATENT NO 8775885
APP PUB NO 20130103997A1
SERIAL NO

13596358

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Abstract

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The present invention relates to an IEEE1588 protocol negative testing method, comprises steps of: connecting a IEEE1588 tester and a slave clock DUT to establish a real-time closed-loop feedback mechanism; taking the IEEE1588 tester as a master clock, and establishing a stable time synchronization with the slave clock DUT; obtaining the timing offset or path delay of the slave clock DUT before disturbance; assembling an abnormal message in a frame and sending it to the slave clock DUT; calculating the timing offset or path delay increment after disturbance of the abnormal message; determining whether there is a sudden change in the timing offset or path delay of the slave clock DUT, wherein if there is no sudden change, the test passes; otherwise the test fails. This testing method uses the field of correction field (correction Field) in the IEEE1588 message to “magnify” the response of the slave clock DUT to the abnormal message stimulus, and realizes a real-time closed-loop detection to efficiently verify whether the message processing logic of the slave clock DUT follows the IEEE1588 protocol.

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Patent Owner(s)

Patent OwnerAddress
STATE GRID CORPORATION OF CHINANO 86 WEST CHANG'AN STREET XICHENG DISTRICT BEIJING 100031
XU JI GROUP CORPORATIONNO 1298 XUJI AVENUE XUCHANG HENAN 461000

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cui, Quan-sheng Xuchang, CN 1 2
Di, Jun-feng Xuchang, CN 1 2
Li, Fu-sheng Xuchang, CN 5 8
Li, Jun-gang Xuchang, CN 2 2
Shi, Hong-guang Xuchang, CN 1 2
Song, Xiao-hui Xuchang, CN 1 2
Song, Yi-ding Xuchang, CN 1 2
Wei, Yong Xuchang, CN 59 342
Zhang, Bao-shan Xuchang, CN 2 3
Zheng, Tuo-fu Xuchang, CN 1 2
Zheng, Yun-zhao Xuchang, CN 1 2

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