High speed test circuit and method
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United States of America Patent
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Jun 17, 2014
Grant Date -
Sep 13, 2012
app pub date -
Mar 2, 2012
filing date -
Mar 11, 2011
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Abstract
A high speed test circuit receives a tester clock from a tester and it conducts a test on a circuit under test. The high speed test circuit generates a high frequency clock according to the tester clock, so it is capable of operating in two frequencies. The high speed test circuit tests the circuit under test according to the high frequency clock, and it performs a low speed operation according to a low frequency clock, which is for example the tester clock.
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