Integrated circuit comprising a FRAM memory and method for granting read-access to a FRAM memory

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8750015
APP PUB NO 20130114324A1
SERIAL NO

13025878

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Abstract

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An electronic device includes an integrated circuit with a FRAM memory and an integrated capacitor connected between a power supply for the FRAM memory and ground. The integrated capacitor has a capacitance sufficient to store the charge necessary for a complete read-and-write-back cycle of the FRAM memory. When granting read-access to the FRAM memory, the FRAM memory is supplied by the integrated capacitor which is then disconnected from the integrated circuit power supply. Upon receiving a request for a read-access to the FRAM memory, a charge detector detects whether the internal capacitor is sufficiently charged for a complete read-and-write-back cycle of the FRAM memory. Read-access to the FRAM memory is only granted if the internal capacitor is sufficiently charged and disconnected from the power supply. An alternative embodiment alternately charges and powers the FRAM from two integrated capacitors.

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Patent Owner(s)

Patent OwnerAddress
TEXAS INSTRUMENTS INCORPORATED7839 CHURCHILL WAY MS 3999 DALLAS TX 75251

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Arnold, Matthias Freising, DE 53 244
Gerber, Johannes Unterschleissheim, DE 25 128
Kuhn, Rudiger Freising, DE 3 6
Rzehak, Volker Ergolding, DE 10 64

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