Method of manufacturing solar cell with upper and lower conductor layers stacked together

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United States of America Patent

PATENT NO 8728851
SERIAL NO

13549877

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Abstract

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A method of manufacturing a solar cell comprises the steps of: forming a lower conductor layer on a front side of a substrate; firing the lower conductor layer at a first temperature to form a first portion embedded into a doped region of the substrate and a second portion; forming an anti-reflection coating (ARC) layer on the front side and the second portion, wherein the ARC layer covers the lower conductor layer such that the second portion is disposed in the ARC layer; forming an upper conductor layer, corresponding to the lower conductor layer and electrically connected to the lower conductor layer, on the ARC layer; and firing the upper conductor layer at a second temperature to form a first portion embedded into the ARC layer and a second portion, which is exposed out of the ARC layer.

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Patent Owner(s)

Patent OwnerAddress
ZECOTEK DISPLAY SYSTEM PTE LTD20 SCIENCE PARK ROAD #01-23/25 SINGAPORE 117674

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lin, Chun-Hung Taipei, TW 314 2365
Liu, Sheng Yung Taoyuan County, TW 6 38
Yang, Chin-Tien Hsinchu County, TW 42 156

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