Secure processing device with keystream cache and related methods
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United States of America Patent
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May 6, 2014
Grant Date -
Nov 25, 2010
app pub date -
May 20, 2009
filing date -
May 20, 2009
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Abstract
A secure processing device may include an external memory storing encrypted data, and a processor cooperating with the external memory. The processor is configured to generate address requests for the encrypted data in the external memory, cache keystreams based upon an encryption key, and generate decrypted plaintext based upon the cached keystreams and the encrypted data requested from the external memory. For example, the processor may be further configured to predict a future address request, and the future address request may be associated with a cached keystream.
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