System and method of interfacing co-processors and input/output devices via a main memory system
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United States of America Patent
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Apr 29, 2014
Grant Date -
Aug 9, 2012
app pub date -
Nov 22, 2011
filing date -
Feb 8, 2011
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Abstract
A system for interfacing with a co-processor or input/output device is disclosed. According to one embodiment, the system includes a computer processing unit, a memory module, a memory bus that connects the computer processing unit and the memory module, and a co-processing unit or input/output device, wherein the memory bus also connects the co-processing unit or input/output device to the computer processing unit.
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