Embedded end-to-end delay information for data networks

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United States of America Patent

PATENT NO 8665884
APP PUB NO 20130051396A1
SERIAL NO

13217823

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Abstract

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A system comprises a plurality of nodes, at least one of the plurality of nodes configured to insert, on a per-virtual link basis, a delay value into a dynamic delay field of a frame corresponding to the respective virtual link, wherein the dynamic delay value represents latency of frames of the respective virtual link. The system also comprises a switch having a plurality of ports, each port coupled to one of the plurality of nodes. The switch is configured to route frames received from the plurality of nodes to one or more of the plurality of nodes. At least one of the plurality of nodes is configured to store frames received from the switch in a buffer and to update the value in the dynamic delay field to reflect the end-to-end system delay.

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Patent Owner(s)

Patent OwnerAddress
TTTECH COMPUTERTECHNIK AGAUSTRIA VIENNA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bauer, Guenther Vienna, AT 11 110
Hall, Brendan Eden Prairie, US 67 952
Steiner, Wilfried Vienna, AT 32 207
Varadarajan, Srivatsan St. Louis Park, US 30 416

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