Stub minimization using duplicate sets of signal terminals in assemblies without wirebonds to package substrate
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 25, 2014
Grant Date -
Apr 4, 2013
app pub date -
Apr 4, 2012
filing date -
Oct 3, 2011
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A microelectronic package can include a microelectronic element having a face and a plurality of element contacts thereon, a substrate having first and second surfaces, and terminals on the second surface configured for connecting the package with at least one external component. The substrate can have substrate contacts on the first surface facing the element contacts of the microelectronic element and joined thereto. The terminals can include first terminals arranged at positions within first and second parallel grids. The first terminals of each grid can be configured to carry address information usable by circuitry within the microelectronic package to determine an addressable memory location from among all the available addressable memory locations of a memory storage array within the microelectronic element. The signal assignments of the first terminals in the first grid can be a mirror image of the signal assignments of the first terminals in the second grid.
First Claim
Other Claims data not available
Family
International Classification(s)
- 2012 Application Filing Year
- H01L Class
- 20465 Applications Filed
- 18077 Patents Issued To-Date
- 88.34 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Aug 25, 2025 |
