Universal timing waveforms sets to improve random access read and write speed of memories
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United States of America Patent
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Jan 21, 2014
Grant Date -
Jun 21, 2012
app pub date -
Dec 12, 2011
filing date -
Dec 13, 2010
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Abstract
Methods of increasing the speed of random read and write operations of a memory device are provided for improving the performance of volatile and non-volatile memory devices. In contrast to the conventional approach that latches the current memory address right before the currently accessed memory data are outputted, the methods latch the next memory address before the currently accessed memory data are read out. The flow, timing waveforms and control sequences of applying the methods to parallel NOR flash, parallel pSRAM, serial SQI NOR flash and NAND flash are described in detail. The NOR flash device designed with the method can be integrated with a NAND flash device on a same die in a combo flash device packaged in either an ONFI compatible NAND flash package or other standard NAND flash package.
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