Circuit structure of package carrier and multi-chip package
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United States of America Patent
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Jan 7, 2014
Grant Date -
Oct 20, 2011
app pub date -
May 31, 2011
filing date -
Nov 20, 2008
priority date (Note) -
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Abstract
A multi-chip package comprises a plurality of chip pads and a plurality of LED chips. The chip pads are arranged in an M×N array, M and N each a positive integer greater than 1. A peripheral area of each chip pad comprises a respective first bonding pad, a respective second bonding pad, and a respective third bonding pad arranged in sequence in a clockwise direction. A first orientation of the respective first to third bonding pads in a first row of the N rows differs from a second orientation of the respective first to third bonding pads in a second row of the N rows by 90 degrees. Each of the LED chips is disposed on a respective one of the chip pads and electrically connected to two of the respective first to third bonding pads on a same side of the respective LED chip.
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