Method of fabricating thin film transistor having amorphous and polycrystalline silicon
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Dec 10, 2013
Grant Date -
Sep 30, 2010
app pub date -
Nov 20, 2008
filing date -
Nov 20, 2007
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Provided are thin film transistor, a method of fabricating the same, a flat panel display device including the same, and a method of fabricating the flat panel display device, that are capable of applying an electric field to a gate line to form a channel region of a semiconductor layer of a thin film transistor using a polysilicon layer crystallized by a high temperature heat generated by Joule heating of a conductive layer. As a result, a process can be simplified using a gate line included in the thin film transistor as the conductive layer, and the channel region of the semiconductor layer can be formed of polysilicon having a uniform degree of crystallinity. The thin film transistor includes a straight gate line disposed in one direction, a semiconductor layer crossing the gate line, and source and drain electrodes connected to source and drain regions of the semiconductor layer.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully