Time-delay integration through reduction of delay between subsequent capture operations of a light-detection device
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United States of America Patent
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Nov 19, 2013
Grant Date -
Jul 4, 2013
app pub date -
Feb 27, 2013
filing date -
Apr 29, 2010
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Abstract
Disclosed are a system, a method and an apparatus of reduction of delay between subsequent capture operations of a light-detection device. In one embodiment, a light-detection circuit includes an avalanche photodiode implemented in a deep submicron CMOS technology. In addition, the light-detection circuit includes a passive quench control circuit to create an avalanche current that generates a high voltage at an output of a second inverter gate of the circuit. The light-detection circuit further includes an active quench control circuit to reduce a dead time of the circuit. The light-detection circuit also includes a reset circuit to create a low voltage at an output of the second inverter gate and to create an active reset through a PMOS transistor of the light-detection circuit.
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