Integrated Non-Linearity (INL) and Differential Non-Linearity (DNL) correction techniques for digital-to-analog converters (DACS)
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United States of America Patent
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Oct 22, 2013
Grant Date -
Jun 28, 2012
app pub date -
Mar 2, 2012
filing date -
Nov 12, 2009
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Abstract
INL values are determined for sub-segments of a DAC adapted to accept N bit digital input codes, and a first set of correction codes that can be used to reduce to a range of INL values (to improve linearity of the DAC) are determined and stored. Additionally, DNL values are determined for the sub-segments of the DAC, and a second set of correction codes that can be used to ensure that all values of DNL>−1 (to ensure that the DAC is monotonic) are determined and stored. This can include using one or more extra bits of resolution to remap at least some of the 2^N possible digital input codes (that can be accepted by the DAC) to more than 2^N possible digital output codes, to ensure that all values of DNL>−1. Such stored first and second sets are thereafter used when performing digital to analog conversions.
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