EEPROM cell structure and a method of fabricating the same

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United States of America Patent

PATENT NO 8564043
APP PUB NO 20120181594A1
SERIAL NO

13005693

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Abstract

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An electrically erasable programmable read only memory (EEPROM) cell structure and a method of fabricating the same. The EEPROM cell comprising a substrate comprising two shallow trench isolation (STI) structures separated by a substrate portion; an intermediate patterned layer formed on the substrate such that the patterned layer covers respective portions of each STI structure; a floating gate bridging between the STI structures such that the floating gate extends over the intermediate patterned layer; a dielectric layer formed over the floating gate; and a control gate formed over the dielectric layer.

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Patent Owner(s)

Patent OwnerAddress
SYSTEMS ON SILICON MANUFACTURING CO PTE LTD70 PASIR RIS INDUSTRIAL DRIVE 1 SINGAPORE 519527

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ho, Eng Keong Singapore, SG 4 0
Huang, Sheng He Singapore, SG 5 3
Peh, Ping Yaw Singapore, SG 1 0

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