DRAM-like NVM memory array and sense amplifier design for high temperature and high endurance operation
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United States of America Patent
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Oct 15, 2013
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Nov 3, 2011
app pub date -
Apr 27, 2011
filing date -
May 3, 2010
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Abstract
A DRAM-like non-volatile memory array includes a cell array of non-volatile cell units with a DRAM-like cross-coupled latch-type sense amplifier. Each non-volatile cell unit has two non-volatile cell devices with respective bit lines and source lines running in parallel and laid out perpendicular to the word line associated with the non-volatile cell unit. The two non-volatile cell devices are programmed with erased and programmed threshold voltages as a pair for storing a single bit of binary data. The two bit lines of each non-volatile cell unit are coupled through a Y-decoder and a latch device to the two respective inputs of the latch-type sense amplifier which provides a large sensing margin for the cell array to operate properly even with a narrowed threshold voltage gap. Each non-volatile cell device may be a 2T FLOTOX-based EEPROM cell, a 2T flash cell, 1 1T flash cell or a 1.5T split-gate flash cell.
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