Logic chip, method and computer program for providing a configuration information for a configurable logic chip
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United States of America Patent
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Oct 8, 2013
Grant Date -
Mar 3, 2011
app pub date -
Sep 8, 2008
filing date -
Sep 13, 2007
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Abstract
A logic chip has a plurality of individually-addressable resource blocks, each comprising logic circuitry. The logic chip also has a bus comprising a plurality of bus information lines. A first of the resource blocks has a coupling between a first strict sub-set of the bus information lines and the logic circuitry of the first resource block. A second of the resource blocks, which is adjacent to the first resource block, has a coupling between a second strict sub-set of the bus information lines and the logic circuitry of the second resource blocks. The first and second sub-sets have different bus lines.
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