Chip resistor substrate
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jul 30, 2013
Issued Date -
N/A
app pub date -
Apr 17, 2008
filing date -
Apr 25, 2007
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method for the targeted introduction of cleavage lines or predetermined breaking lines in ceramic substrates for subsequent separation, wherein, in a thermal treatment step or methods step, the cleavage line or predetermined breaking line is heated locally and then cooled suddenly by a coolant in such a way that targeted cracking or material weakness occurs along the cleavage line or predetermined breaking lines.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully