High-speed latch circuit
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United States of America Patent
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Jul 2, 2013
Grant Date -
Mar 22, 2012
app pub date -
Sep 1, 2011
filing date -
Sep 21, 2010
priority date (Note) -
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Abstract
A high-speed latch circuit includes a latching unit for latching an inputted signal, a signal input unit connected to the latching unit and a clock control unit connected to the signal input unit. The clock control unit includes a first switch element, a second switch element connected to the first switch element and an inverter connected to the second switch element. The first switch element and the inverter are both connected to a clock signal input end. The high-speed latch circuit of the present invention has a simple circuit structure, shortens the triggering time of the signal and reduces chances of wrong triggering.
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