Method for manufacturing a semiconductor structure

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United States of America Patent

PATENT NO 8466013
APP PUB NO 20130001691A1
SERIAL NO

13381075

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Abstract

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The present invention provides a method for manufacturing a semiconductor structure, which comprises: providing an SOI substrate, and forming a gate structure on the SOI substrate; etching an SOI layer and a BOX layer of the SOI substrates on both sides of the gate structure, so as to form trenches exposing the BOX layer and extending partially into the BOX layer; forming metal sidewall spacers on sidewalls of the trenches, wherein the metal sidewall spacers is in contact with the SOI layer under the gate structure; forming an insulating layer filling partially the trenches, and forming a dielectric layer to cover the gate structure and the insulating layer; etching the dielectric layer to form first contact through holes that expose at least partially the insulating layer, and etching the insulating layer from the first contact through holes to form second contact through holes that expose at least partially the metal sidewall spacer; filling the first contact through holes and the second contact through holes to form contact vias, which are in contact with the metal sidewall spacers. The method provided by the present invention is capable of improving performance of semiconductor devices and alleviating manufacturing difficulty at the mean time.

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Patent Owner(s)

Patent OwnerAddress
BEIJING NMC CO LTDNO 8 WENCHANG AVENUE BEIJING ECONOMIC-TECHNOLOGICAL DEVELOPMENT AREA BEIJING 100176
INSTITUTE OF MICROELECTRONICS CHINESE ACADEMY OF SCIENCESNO 3 BEITUCHENG WEST ROAD BEIJING 100029

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Luo, Zhijiong Poughkeepsi, US 255 4762
Yin, Haizhou Poughkeepsie, US 244 3095
Zhu, Huilong Poughkeepsi, US 705 13304

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