Synchronization system and related integrated circuit
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United States of America Patent
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Jun 4, 2013
Grant Date -
Sep 1, 2011
app pub date -
Feb 7, 2011
filing date -
Feb 26, 2010
priority date (Note) -
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Abstract
A synchronization system includes a memory and a control circuit. The control circuit includes a write interface for writing data in said memory with a first clock signal, wherein the write interface is configured for operating with a write pointer in response to a write command, a read interface for reading data from said memory with a second clock signal, wherein the read interface is configured for operating with a read pointer in response to a read command, a synchronization circuit for synchronizing said write pointer and said read pointer with a synchronization latency, and an elaboration circuit for elaborating data in memory with an elaboration latency, wherein the elaboration latency is smaller than the synchronization latency.
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