Global line sharing circuit of semiconductor memory device
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United States of America Patent
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May 21, 2013
Grant Date -
Oct 6, 2011
app pub date -
Dec 23, 2010
filing date -
Mar 31, 2010
priority date (Note) -
Expired
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Abstract
A global line sharing circuit of a semiconductor memory device includes: a ZQ calibration unit configured to adjust an impedance of a DQ output driver; a test unit configured to control a test operation; and a shared global line coupled to and used in common by the ZQ calibration unit and the test unit.
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