Memory system and method for improved utilization of read and write bandwidth of a graphics processing system
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United States of America Patent
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May 21, 2013
Grant Date -
Sep 27, 2012
app pub date -
Jun 4, 2012
filing date -
Dec 13, 2000
priority date (Note) -
Expired
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Abstract
A system for processing graphics data. The graphics processing system includes an embedded memory array having at least three separate banks of single-ported memory in which graphics data are stored. A memory controller coupled to the banks of memory writes post-processed data to a first bank of memory while reading data from a second bank of memory. A synchronous graphics processing pipeline processes the data read from the second bank of memory and provides the post-processed graphics data to the memory controller to be written back to a bank of memory. The processing pipeline concurrently processes an amount of graphics data at least equal to that included in a page of memory. A third bank of memory is precharged concurrently with writing data to the first bank and reading data from the second bank in preparation for access when reading data from the second bank of memory is completed.
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