Semiconductor storage device with a well control circuit
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United States of America Patent
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Apr 30, 2013
Grant Date -
Oct 13, 2011
app pub date -
Mar 22, 2011
filing date -
Apr 9, 2010
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A semiconductor storage device according to an embodiment includes multiple memory cells which electrically rewrite data, a well control circuit which outputs an erasure voltage to be applied to a well through an output terminal, a first pump circuit which outputs a voltage set by boosting an input voltage to the output terminal, a second pump circuit which outputs a voltage set by boosting the input voltage to the output terminal and outputs a voltage higher than an output voltage of the first pump circuit, a pump switching detecting circuit which outputs an assist signal to perform a boosting operation on at least one of the first pump circuit and the second pump circuit and an erase pulse control circuit which sets target voltages of the first pump circuit and the second pump circuit, on the basis of setting values to set a target voltage of the erasure voltage.
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