Method for obtaining high-quality boundary for semiconductor devices fabricated on a partitioned substrate
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United States of America Patent
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Apr 23, 2013
Grant Date -
Nov 17, 2011
app pub date -
Jul 6, 2011
filing date -
Apr 20, 2007
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Abstract
One embodiment of the present invention provides a process for obtaining high-quality boundaries for individual multilayer structures which are fabricated on a trench-partitioned substrate. During operation, the process receives a trench-partitioned substrate wherein the substrate surface is partitioned into arrays of isolated deposition platforms which are separated by arrays of trenches. The process then forms a multilayer structure, which comprises a first doped layer, an active layer, and a second doped layer, on one of the deposition platforms. Next, the process removes sidewalls of the multilayer structure.
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