Methods for reducing loading effects during film formation

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United States of America Patent

PATENT NO 8415236
APP PUB NO 20100167505A1
SERIAL NO

12648309

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Abstract

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A method for fabricating a semiconductor device is provided. The method comprises selectively forming a first layer over a first and second exposed portions of a substrate. The first and second exposed portions are of different sizes and are located adjacent to a first and second active devices. During the first layer formation, a gas mixture comprising first and second source gases that function as growth components for forming the first layer and a reactant gas that functions as an etching component for controlling selectivity of the first layer growth is provided. The reactant gas is different from the first and second source gases and one of first and second source gases forms the first layer at a faster rate over the first exposed portion as compared to the second exposed portion and the other source gas exhibits an opposite behavior.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING CO LTDHSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chew, Han Guan Singapore, SG 3 19
Liu, Jinping Singapore, SG 83 1122
See, Alex Kai Hung Singapore, SG 7 70
Zhou, Mei Sheng Singapore, SG 133 2512

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