Multi-phased computational reconfiguration
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United States of America Patent
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Mar 12, 2013
Grant Date -
Jun 23, 2011
app pub date -
Dec 23, 2009
filing date -
Dec 23, 2009
priority date (Note) -
Expired
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Abstract
Problem solution speed may be increased by dynamically changing processing device computational hardware configuration in concert with respective mathematical phases of an algorithm to match accuracy demands at various phases of computation. Smaller but faster hardware structures may be increased in size using real-time partial or full reconfiguration of a processing device to apply the smallest and fastest possible computational structure for the needed accuracy during each of multiple computational phases.
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