Semiconductor substrate with interlayer connection and method for production of a semiconductor substrate with interlayer connection

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United States of America Patent

PATENT NO 8378496
APP PUB NO 20100314762A1
SERIAL NO

12670303

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Abstract

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The interlayer connection of the substrate is formed by a contact-hole filling (4) of a semiconductor layer (11) and metallization (17) of a recess (16) in a reverse-side semiconductor layer (13), wherein the semiconductor layers are separated from each other by a buried insulation layer (12), at whose layer position the contact-hole filling or the metallization ends.

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Patent Owner(s)

Patent OwnerAddress
AUSTRIAMICROSYSTEMS AGSCHLOSS PREMSTATTEN UNTERPREMSTATTEN 8141

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kraft, Jochen Oberaich, AT 37 114
Schrank, Franz Graz, AT 60 355
Schrems, Martin Eggersdorf, AT 81 1245

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