Semiconductor integrated circuit having protection circuit capable of protecting against ESD and EOS
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United States of America Patent
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Jan 15, 2013
Grant Date -
Oct 28, 2010
app pub date -
Apr 21, 2010
filing date -
Apr 28, 2009
priority date (Note) -
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Abstract
A semiconductor integrated circuit has an internal circuit having an input terminal connected to a connection terminal, a protection circuit that discharges an over-voltage supplied to the connection terminal to a power line. The protection circuit includes a first discharge circuit connected to the connection terminal, a second discharge circuit connected to the connection terminal and discharges the over-voltage to the power line, and an over-voltage detect circuit that detects a discharge current flowing through the second discharge circuit and generates an over-voltage detect signal when the discharge current is detected. The first discharge circuit is disabled to discharge the over-voltage when the over-voltage detect signal is supplied.
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