Side loaded shorted patch RFID tag
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United States of America Patent
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-
Jan 1, 2013
Grant Date -
Jun 18, 2009
app pub date -
Dec 10, 2008
filing date -
Dec 17, 2007
priority date (Note) -
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Abstract
An RFID tag includes a circuit board assembly having a substrate comprised of a material with a high dielectric constant of greater than approximately 4 and having a first side and a second side. A patch antenna is mounted to the first side of the substrate. A metallic ground plane is mounted to the second side of the substrate, and an RFID circuit is at the second side of the substrate. A shorting wall includes a plurality of through holes extending through the substrate and interconnecting the antenna with the ground plane. The plurality of through holes are generally linearly arranged relative to each other along an edge of the ground plane. An electrically conductive via extends through the substrate and interconnects the antenna with the RFID circuit. The via is at a distance from the shorting wall whereby an impedance of the RFID circuit approximately matches an impedance of the antenna. A backplane is coupled with the ground plane, on a side of the ground plane opposite the substrate.
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