Mask-layout creating method, apparatus therefor, and computer program product

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United States of America Patent

PATENT NO 8336006
APP PUB NO 20110209107A1
SERIAL NO

13028525

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Abstract

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According to one embodiment, a design layout highly likely to be a dangerous point in a lithography process is set, a coherence map kernel for generating the mask layout is set with respect to the set design layout, the coherence map is created based on the set coherence map kernel and the set design layout, the auxiliary pattern is extracted from the created coherence map and shaped to generate the mask layout, a cost function COST for evaluating an optimization degree of the mask layout is defined, the generated mask layout is evaluated using the cost function, and at least one of parameters of the coherence map kernel and parameters in extracting and shaping the auxiliary pattern from the coherence map are changed until the mask layout evaluated using the cost function is optimized.

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Patent Owner(s)

Patent OwnerAddress
KIOXIA CORPORATION1-21 SHIBAURA 3-CHOME MINATO-KU TOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kodama, Chikaaki Kanagawa, JP 52 401
Kodera, Katsuyoshi Kanagawa, JP 16 41

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