Wafer level surface passivation of stackable integrated circuit chips
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United States of America Patent
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Dec 4, 2012
Grant Date -
Jun 23, 2011
app pub date -
Mar 4, 2011
filing date -
Jun 19, 2007
priority date (Note) -
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Abstract
An electrically insulative conformal coating is applied at least to the active (front) side and one or more sidewalls of the die during wafer processing. Also, a die has an electrically insulative conformal coating applied to at least the active (front) side and sidewalls. Also, assemblies include a stack of such die, electrically interconnected die-to-die; and assemblies include such a die or a stack of such die, electrically interconnected to underlying circuitry (for example in a substrate or a circuit board).
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