Use of F-based gate etch to passivate the high-k/metal gate stack for deep submicron transistor technologies
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United States of America Patent
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Nov 27, 2012
Grant Date -
Jul 10, 2008
app pub date -
Jan 9, 2008
filing date -
Jan 10, 2007
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Abstract
A new, effective and cost-efficient method of introducing Fluorine into Hf-based dielectric gate stacks of planar or multi-gate devices (MuGFET), resulting in a significant improvement in both Negative and Positive Bias Temperature Instabilities (NBTI and PBTI) is provided. The new method uses an SF6 based metal gate etch chemistry for the introduction of Fluorine, which after a thermal budget within the standard process flow, results in excellent F passivation of the interfaces. A key advantage of the method is that it uses the metal gate etch for F introduction, requiring no extra implantations or treatments. In addition to the significant BTI improvement with the novel method, a better Vth control and increased drive current on MuGFET devices is achieved.
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