Semiconductor memory with memory cell portions having different access speeds
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United States of America Patent
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Nov 6, 2012
Grant Date -
Aug 25, 2011
app pub date -
Feb 23, 2010
filing date -
Feb 23, 2010
priority date (Note) -
Expired
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Abstract
A semiconductor memory including a plurality of memory banks disposed on an integrated circuit, each memory bank including an array of memory cells, wherein a first portion of memory cells of the plurality of memory banks has a first access speed and a second portion of memory cells of the plurality of memory banks has a second access speed, wherein the first access speed is different from the second access speed.
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