Device and process for data rate acquisition
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United States of America Patent
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Oct 2, 2012
Grant Date -
Oct 22, 2009
app pub date -
Aug 2, 2006
filing date -
Aug 2, 2006
priority date (Note) -
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Abstract
A baud rate acquisition circuit (10) for synchronizing a sampling signal with an input signal operates in broad rate sweeping and a rate fine tuning phases. In the rate sweeping phase, a timing error detector (24) examines the sampling signal generated by a decimator (16). If the sampling signal is outside a rate acquisition range from the target rate, a rate sweeping algorithm selects a new sampling rate. In response to the sampling rate within the rate acquisition range, the timing error detector (24) examines the asymmetry thereof to generate a rate correction signal to synchronize the sampling signal with the input signal. Next in the rate fine tuning phase, a multiplexer (22) routes the sampling signal through a square root filter (18). By examining the waveform shaped signal, the time error detector (24) synchronizes the sampling signal with the input signal with high accuracy.
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