N-channel SONOS non-volatile memory for embedded in logic

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United States of America Patent

PATENT NO 8228726
APP PUB NO 20110032766A1
SERIAL NO

12906153

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Abstract

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A system and method of an electrically programmable and erasable non-volatile memory cell fabricated using a single-poly, logic process with the addition of ONO deposition and etching is disclosed. In one embodiment, a non-volatile memory system includes at least one non-volatile memory cell consists of a SONOS transistor fabricated on a P substrate, with a deep N-well located in the P substrate, with a P-well located in the deep N-well. The memory cell further includes an access NMOS transistor, coupled to the SONOS transistor and located in the same P-well that includes an oxide only gate-dielectric. The cell can be fabricated in a modified logic process with other transistors and with their physical characteristics preserved.

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Patent Owner(s)

Patent OwnerAddress
CHIP MEMORY TECHNOLOGY INC2210 O'TOOLE AVE SUITE 280 SAN JOSE CA 95131

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fang, Gang-Feng Fremont, US 13 129
Leung, Wingyu Cupertino, US 104 5518

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