Enhancing time-wise likelihood for a leak current from a floating memory node in a display device having a shift register circuit
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United States of America Patent
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Jul 10, 2012
Grant Date -
Sep 10, 2009
app pub date -
Feb 24, 2009
filing date -
Mar 4, 2008
priority date (Note) -
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status (Latency Note)
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Abstract
In a display device which includes a driver circuit having a shift register circuit, the shift register circuit is constituted of basic circuits in plural stages. Each basic circuit is constituted of a circuit A, a circuit B and a circuit C. The circuit A fetches a first drive clock (or a second drive clock) inputted from the outside when transfer data is inputted to the circuit A from a circuit of preceding stage, outputs the transfer data as a shift output of own stage, and transfers the transfer data to the circuit B. The circuit B transfers the transfer data to the circuit A of the basic circuit of the succeeding stage, and resets the circuit C. The circuit C resets the circuit A and the circuit B in synchronism with the first drive clock (or the second drive clock) generated at next timing or succeeding timing of the first drive clock.
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