Apparatus and methods for adjusting performance of programmable logic devices
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United States of America Patent
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Jun 12, 2012
Grant Date -
Aug 25, 2011
app pub date -
Apr 30, 2011
filing date -
Feb 24, 2006
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Abstract
A programmable logic device (PLD) includes at least two regions. Each region includes electrical circuitry that has a set of transistors. Each of the two regions has a corresponding fixed transistor threshold voltage, a corresponding fixed transistor body bias, and a corresponding fixed supply voltage.
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