Method of controlling frame memory, memory control circuit, and image processing apparatus including the memory control circuit

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United States of America Patent

PATENT NO 8194090
APP PUB NO 20090184971A1
SERIAL NO

12318994

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Abstract

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Various exemplary embodiments provide methods of controlling frame memory, memory control circuits, and image processing apparatuses including the memory control circuits. Data representing values of pixels constituting each of a plurality of frames are received in an order of the frames, and data representing values of pixels constituting a previous frame are read from the frame memory and data representing values of pixels constituting a next frame are written to the frame memory. By reading first data representing values of a portion of the pixels constituting the previous frame from the frame memory before receiving of data representing values of pixels constituting the next frame starts, a delay time before starting to output data representing values of pixels of the previous frame can be shortened.

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Patent Owner(s)

Patent OwnerAddress
KAWASAKI MICROELECTRONICS INC1-3 NAKASE MIHAMA-KU CHIBA-SHI CHIBA 261-8501

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sato, Shinsuke Chiba, JP 63 1445

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