Random cache line refill
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United States of America Patent
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May 29, 2012
Grant Date -
Jun 5, 2008
app pub date -
Nov 21, 2007
filing date -
Jun 1, 2001
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Abstract
A microprocessor including random cache line refill ordering to lessen side channel leakage in a cache line and thus thwart cryptanalysis attacks such as timing attacks, power analysis attacks, and probe attacks. A random sequence generator is used to randomize the order in which memory locations are read when filling a cache line.
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