Data processing arrangement comprising a reset facility
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United States of America Patent
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May 8, 2012
Grant Date -
Jan 15, 2009
app pub date -
Sep 26, 2006
filing date -
Oct 25, 2005
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A data processing arrangement (MPS) comprises a plurality of data processors (SPR, PM1, . . . , PM4) that can be reset individually. A reset module (RSM) handles various reset request signals (HRG, SRG, SRP1, . . . , SRP4) in accordance with a prioritization and timing scheme so as to obtain respective reset signals (GRS, PRS1, . . . , PRS4) for respective data processors (SPR, PM1, . . . , PM4). The reset module (RSM) preferably comprises a reset request register, which stores respective reset requests that the respective reset request signals convey, and a request execute register, which stores respective granted reset requests that the reset signals convey.
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