Systems and methods for sending data packets between multiple FPGA devices

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8175095
APP PUB NO 20100157854A1
SERIAL NO

12340094

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Application Specific Integrated Circuit (“ASIC”) devices, such as Field Programmable Gate Arrays (“FPGAs”), may be interconnected using serial I/O connections, such as high speed multi-gigabit serial transceiver (“MGT”) connections. For example, serial I/O connections may be employed to interconnect a pair of ASICs to create a high bandwidth, low signal count connection, and in a manner so that any given pair of multiple ASIC devices on a single circuit card may communicate with each other through no more than one serial data communication link connection step. A reconfigurable hardware architecture (“RHA”) may be configured to include a communications infrastructure that uses a high-bandwidth packet router to establish standard communications protocols between multiple interfaces and/or multiple devices that may be present on a single circuit card. Dynamically-sized data packets, sized in accordance with the amount of data ready to be sent, are transferred between the devices and/or interfaces on the card.

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Patent Owner(s)

Patent OwnerAddress
L-3 COMMUNICATIONS CORPORATION600 THIRD AVENUE 34TH FLOOR NEW YORK NY 10016

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Anderson, Joshua D Garland, US 7 175
Burkart, Scott M Royse City, US 8 221
DeLaquil, Matthew P Rockwall, US 11 387
Prasanna, Deepak Rockwall, US 15 524

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