Integrated circuit testing module configured for set-up and hold time testing

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United States of America Patent

PATENT NO 8166361
APP PUB NO 20070067687A1
SERIAL NO

11552944

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Systems and methods of testing integrated circuits are disclosed. The systems include a test module configured to operate between automated testing equipment and an integrated circuit to be tested. The testing interface is configured to test time sensitive parameters of the integrated circuit. The testing interface includes components for generating addresses, commands, and test data to be conveyed to the integrated circuit as well as a clock adjustment component. By adjusting the clock synchronization controlling the test signals to be conveyed to the integrated circuit, set-up time and hold time can be tested. The systems are configured to test set-up time and hold time of individual data channels, for example, an individual address line of the integrated circuit.

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Patent Owner(s)

Patent OwnerAddress
INAPAC TECHNOLOGY INC2290 NORTH FIRST STREET SUITE 201 SAN JOSE CA 95131

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ong, Adrian E San Jose, US 124 2563

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