Method of fabricating a semiconductor multi-package module having wire bond interconnect between stacked packages

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United States of America Patent

PATENT NO 8143100
APP PUB NO 20070292990A1
SERIAL NO

11849112

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Abstract

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A method for making a semiconductor multi-package module includes; providing a lower molded package including a lower substrate and a die, affixing an upper molded package including an upper substrate onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.

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Patent Owner(s)

  • STATS CHIPPAC, INC.;STATS CHIPPAC PTE. LTE.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Karnezos, Marcos Palo Alto, US 76 4894

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