SIMD processor performing fractional multiply operation with saturation history data processing to generate condition code flags
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United States of America Patent
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Mar 6, 2012
Grant Date -
Dec 3, 2009
app pub date -
Aug 12, 2009
filing date -
Aug 9, 2002
priority date (Note) -
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Abstract
A data processing system, apparatus and method for performing fractional multiply operations is disclosed. The system includes a memory that stores instructions for SIMD operations and a processing core. The processing core includes registers that store operands for the fractional multiply operations. A coprocessor included in the processing core performs the fractional multiply operations on the operands and stores the result in a destination register that is also included in the processing core.
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