Method and manufacture for high voltage gate oxide formation after shallow trench isolation formation
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United States of America Patent
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Feb 14, 2012
Grant Date -
Feb 9, 2012
app pub date -
Aug 4, 2010
filing date -
Aug 4, 2010
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Abstract
A method and manufacture for fabrication of flash memory is provided. In fabricating the periphery region of the flash memory, the low voltage gate oxides and high voltage gate oxides are grown to the same height as each other prior to STI etching. After STI etching and gap fill, the nitride above the high voltage gate oxide regions are etched, and the oxide in high voltage gate oxide regions is grown to the appropriate thickness for a high voltage gate oxide.
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