Analog switch with a low flatness operating characteristic
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United States of America Patent
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Nov 8, 2011
Grant Date -
Jun 9, 2011
app pub date -
Dec 8, 2009
filing date -
Dec 8, 2009
priority date (Note) -
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Abstract
An analog switch includes a transistor whose source connected to a signal input and whose drain is connected to a signal output. An output of a gate control circuit is connected to the transistor gate. A first input of the gate control circuit is connected to the source of the transistor. The gate control circuit responds to a logic transition of an enable signal received at a second input by pre-charging a substantially constant gate-to-source voltage across the transistor. This voltage is stored by a gate-to-source connected capacitor. In one steady-state logic condition of the enable signal, the gate control circuit operates to turn off the transistor. In another steady-state logic condition of the enable signal, the gate control circuit permits the signal received at the signal input to drive the gate of the transistor with a voltage offset by the substantially constant gate-to-source voltage stored on the capacitor.
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