EEPROM devices and methods of operating and fabricating the same
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United States of America Patent
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Nov 1, 2011
Grant Date -
Dec 17, 2009
app pub date -
Aug 18, 2009
filing date -
Dec 22, 2005
priority date (Note) -
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Abstract
An electrically erasable and programmable read-only memory (EEPROM) is provided. The EEPROM includes a semiconductor substrate including spaced apart first, second and third active regions, a common floating gate traversing over the first through third active regions, source/drain regions formed in the third active region on opposite sides of the floating gate, a first interconnect connected to the first active region, a second interconnect connected to the second active region, and a third interconnect connected to either one of the source/drain regions.
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